A start-up high performance computing company, with funding from Chevron’s Technology Ventures unit has set out to change the face of high performance computing (HPC). Conventional wisdom has it that the PC cluster offers unbeatable price/performance in HPC. Indeed, the PC cluster has largely displaced high-end bespoke silicon from the likes of Cray and SGI from the TOP 500 HPC performance classification. The received view is that microprocessor is now a commodity and that developing a competing architecture would be prohibitively expensive.
There are however a couple of flies in the PC cluster ointment. As node counts grow, power consumption and cooling requirements are embarrassingly high. But more significantly, connecting hundreds or thousands of PCs together creates interconnection problems that result in real CPU usage of perhaps only 10% of the theoretical maximum.
SiCortex’ plan to ‘engineer a cluster computer from the silicon up’ has involved taking a different slant of ‘commoditization.’ Today, building a ‘bespoke’ chip need not imply the multi man-years of past generations. SiCortex’ John Goodhue told IT Journal, ‘Our design team of 25 didn’t design the chip from the ground up, instead, we leveraged common off the shelf components (COTS). 80% of the new is COTS. Entry costs in chip design and manufacture have fallen dramatically, driven by cell phone and router companies.’
‘We designed our chip for cluster use and have been able to put a cluster onto the motherboard, reducing interconnect times and increasing performance. The system looks like a single machine with equal access to 8TB of memory from all processors. The interconnect performance barriers are down, you can get data in and out faster. This means the system has great potential for seismic processing where loading a multi TB data set to RAM can be a significant part of the total job time.’
6 processor node
Each chip contains six 64-bit, 600 milliwatt processor cores, multiple memory controllers, a high performance cluster interconnect and PCI Express connection to storage and internetworking. A node with DDR-2 memory consumes 15 watts of power, an order of magnitude less than a conventional cluster node.
The new design shrinks a potential 6 teraflops of compute power into a single cabinet with a 5’ x 5’ footprint. Software is Open Source, Linux, GNU and QLogic’s PathScale compilers for FORTRAN, C and C++. SiCortex will soon ship its first beta products, the 5.8 teraflop SC5832, and the SC648 with a half-teraflop peak. We asked Goodhue where this would rank in the TOP 500. He replied, ‘Our market is more the bottom 10k than the Top 500! But we expect to make the bottom half of the Top 500 later this year.’
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